This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-216980, filed Jul. 17, 2001, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor storage device having a data copying function that writes data stored in an area of a memory cell array into another area, and more particularly to a flash memory to which a large batch of data is written.
2. Description of the Related Art
A NAND flash memory is known as a kind of a non-volatile memory. In the NAND flash memory, a plurality of memory cells constituting non-volatile transistors are connected in series to form a NAND cell. Data writing is applied to a plurality of memory cells in parallel, and data erasure is performed electrically by batching data on the basis of a block unit that is constituted of a plurality of NAND cells. The data writing in the NAND flash memory comprises sequentially supplying a sense/latch circuit that includes a plurality of latch circuits with data to be written, and supplying a memory cell array with the data latched by the sense/latch circuit via a bit line.
The reason why the data to be written is latched by the sense/latch circuit is that a data writing method of the NAND flash memory is one in which writing is performed by batching a large quantity of data in order to accelerate the effective speed. A writing unit in the NAND flash memory is called one page. Normally, one page is constituted of a plurality of memory cells having a common word line.
When data writing is performed with a NAND flash memory, normally, one batch of data is written in one block because of the simplicity in data management. This makes a free area in one block fairly large, resulting in ineffective use of a data area.
In FIG. 1, a plurality of blocks 52 are provided in a memory cell array 51. In each of the blocks 52, areas that are shaded indicate where data is written, and other areas indicate where data is not written.
Therefore, when a NAND flash memory is used, data of one page in a certain block is read out from the data that has once been written, and the read data is temporarily latched by the sense/latch circuit. The data latched by the sense/latch circuit is then written into a page of the free area in a block that is different from the block where the data was read out. This enables effective use of memory space. Such an operation is called page copying. Page copying enables effective use of memory space.
As shown in FIG. 2, the NAND flash memory has a data area 53 for storing usual data, and in addition to this, the memory space called a redundant area 54. The redundant area 54 is the shaded area in FIG. 2. This redundant area 54 is provided in every page, and is usually used for storing data concerned with the data storage state of each page. For example, state of a page can be written in the redundant area 54; an error check code (ECC) used for error correction of data, data indicating that data of the corresponding page is erasable, and data indicating that the data of the corresponding page is copied data.
If page copying is performed, the data read from the page of a copy source is written into the page of a copy destination as it is, including the data in the redundant area 54. As a result, in the destination where the page is copied, the data in the redundant area 54 does not reflect the state of the page correctly. When performing page copying, it is necessary to be able to rewrite the data with regard to the redundant area 54 while keeping the data in the data area 53 as it is.
However, it has been impossible to rewrite part of the data in conventional page copying without reading data out of the memory. This has led to a desire for the NAND flash memory capable of rewriting part of the data during the page copying.
According to a first aspect of the present invention, there is provided a semiconductor storage device comprises: a memory cell array which data is written into and read from every page; and control circuits, connected to the memory cell array, for rewriting at least part of the data in the data of one page read from an arbitrary page in the memory cell array, and writing the rewritten data into another page in the memory cell array.
According to a second aspect of the present invention, there is provided a semiconductor storage device comprises: a memory cell array constituted of a plurality of word lines, a plurality of bit lines, and a plurality of memory cells which are connected to the plurality of word lines and the plurality of bit lines, data writing and data reading are performed for every page that is constituted of the plurality of memory cells commonly connected to one word line; a row decoder connected to the plurality of word lines for selecting an arbitrary word line from the plurality of word lines and selecting an arbitrary page in the memory cell array; and a sense/latch circuit connected to the plurality of word lines for sensing data of one page read from the memory cell array and latching the sensed data when reading data from the memory cell array, and for supplying the memory cell array with the latched data of one page and rewriting arbitrary data from the latched data of one page when writing data in the memory cell array.
According to a third aspect of the present invention, there is provided an operation method of a semiconductor storage device comprises: reading data in parallel from a plurality of memory cells in a certain memory area of a non-volatile semiconductor storage device that has a plurality of memory areas each including a plurality of memory cells; latching the read data by a plurality of latch circuits, and rewriting at least part of the data latched by the plurality of latch circuits; and writing the data at least part of which is rewritten into the plurality of memory cells of the memory area that is different from the memory area from which the data is read.